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May 2, 2005 Shelton, CT -- TranSwitch, a provider of transport and switching semiconductor platforms for voice, data, and video communications, has introduced its EtherPHAST-24 dual OC-12 mapper-framer, adding to the company's line of EtherMap and EtherPHAST transport devices for Ethernet, SAN, TDM, and packet clients.
According to the company, the device is designed for multi-service applications, including full rate Gigabit Ethernet (GbE) and sub-rate SAN requirements in small to large MSPP/ADM/CWDM platforms, where redundant OC-12 (622-Mbit/sec) mapping bandwidth is optimal, or where a single device supports two OC-12 ring interfaces.
The company says the device complements its EtherPHAST-48 Plus full rate OC-48 EoS/SAN framer-mapper, as well as its EtherMap-12 and EtherMap-3 OC-12 and OC-3 EoS mappers. According to the company, the device's intelligent software API driver/firmware set and external interfaces are identical to those of the EtherPHAST-48 Plus, allowing customers to leverage software integration and board design across multiple projects with differing bandwidth rates and interface requirements. The company also says the device's telecom bus expansion port and internal cross-connect allows for system designs that combine the device with the company's EtherMap-12 or EtherMap-3 devices to provide both high order and low order mapping, as well as cross connection and grooming for VCAT/LCAS applications.
The company says the device provides low latency mapping of multiple protocols over SONET. Its "ANY-Mapper" capability provides a line side SONET/SDH backplane, a telecom bus for expansion, aggregation, or protection, a SerDes-based interface for high speed GbE capability, and lower speed interfaces for Fast Ethernet, sub-rate FC, ESCON, packet, or DVB-ASI applications. According to the company, all four terminals can be configured for "any port to any port" data path grooming; interface combinations can then employ the device's internal encapsulation and cross-connect capabilities, including GFP (framed and transparent mode), PPP/BCP, HDLC, transparent HDLC, and LAPS. LCAS is also supported, as well as standard and arbitrary pointer-based, non-standard contiguous, and virtual concatenations (VCAT) for SONET/SDH.
The device is packaged in an 844-pin Super Flip Chip Ball Grid Array (SFCBGA); its design is based on .13 micron technology.
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