Lightwave Online Article |  | |
February 15, 2006 Rochester, NY -- Xelic, a provider of networking intellectual property and engineering design services, recently introduced its family of SONET/SDH transport processor cores, designed for integration into FPGA and ASIC networking devices. The transport processor cores are available for OC-3 (XCS3F), OC-12 (XCS12F), OC-48 (XCS48F), OC-192 (XCS192F), and OC-768 (XCS768F) data rates.
The company says its SONET/SDH transport processor cores perform section and line overhead processing, align incoming SONET/SDH frames, and provide overhead interpretation with error detection and performance monitoring. The cores contain independent transmit and receive processors with optional dedicated external ports for overhead insertion and extraction. A generic register interface is implemented for access and configuration of internal memory mapped locations.
"The Xelic family of SONET/SDH transport processor cores is an integral part of our flexible product offering to provide standalone functionality and configurable integration with other cores for functions such as SONET/SDH framers with pointer processing, targeted for networking applications," comments Doug Bush, director of IP development at Xelic.
The company says its cores are developed using a modular architecture, allowing customers to choose only the functions required for their system application; such development yields increased flexibility in the partitioning of the overall system, says the company. Cores are available under a variety of flexible licensing terms and come with full documentation and a comprehensive suite of self-checking tests. Core customization and integration services are also available.
|
Return to Previous Page
Webcasts | |
|
Sponsored White Papers Library | | |
|
|
|
|
Regional Editions 
| View all PennWell sites | View all PennWell events | Industry Links
Add RSS Feed
